Ledger says there was a data breach at its payment processor Global-e, announced on January 5, 2026. Ledger emailed customers whose information was affected to say personal data, such as names and ...

Hardware wallet giant Ledger is grappling with a data exposure incident, this time linked to its third-party payment processor Global-e, according t o pseudonymous blockchain sleuth ZachXBT.

Hardware wallet maker Ledger is dealing with another data exposure incident, this time linked to its external payment ...

Crypto wasn't stolen this time, but data was leaked with the potential to lead to thefts later on.

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More Intel has announced its Xeon 6 chip to ensure that data centers can ...

As enterprises continue to explore different ways to optimize how they handle different workloads in the data center and at the edge, a new startup, Ubitium, has emerged from stealth with an ...

MIPS I8500 delivers deterministic, secure data orchestration for Physical AI with 3rd generation four-thread-per-core processor built using open RISC-V ISA MIPS, a GlobalFoundries company, announced ...

Ledger reportedly suffered another data breach via third-party provider Global-e, raises concerns of crypto wallet security & phishing risks.

Ledger customers' data leaked through Global-e processor breach. Names and contact info exposed in latest security incident.

On July 25, the California Department of Financial Protection and Innovation (DFPI) released a new opinion letter concluding that a company that merely receives payment instructions, orders, or ...

During the company’s annual update video, Ampere Computing announced an extension to its Altra and Altra Max processor families called AmpereOne. AmpereOne features a new Ampere-designed core and new ...

Intel Tuesday rolled out its new Skylake family of server processors aimed specifically at data center applications with the new mesh-based Purley architecture to reduce latency at high core counts.